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Device Materials Group

 

Biography

I received my PhD degree from Lund University in Sweden, where I worked on the electrical characterisation of gate oxide defects in III-V MOS transistors. (Thesis ISBN 978-91-7895-520-6)

My present research, which I started in September 2020, is concerned with the development of forming-free low-power resistive memory for conventional and neuromorphic computing applications. For this, I am investigating the properties of materials with ionic channels intrinsic to their structure and how these properties can be transferred to industry-compatible hafnium oxide.

Publications

Key publications: 
  • M. Hellenbrand, E. Lind, O.-P. Kilpi & L.-E. Wernersson, "Effects of traps in the gate stack on the small-signal RF response of III-V nanowire MOSFETs", Solid-State Electronics, May 2020, doi: 10.1016/j.sse.2020.107840

  • M. Hellenbrand, E. Memisevic, M. Berg, O.-P. Kilpi, J. Svensson & L.-E. Wernersson, "Low-Frequency Noise in III-V Nanowire TFETs and MOSFETs", IEEE Electron Device Letters, September 2017, doi: 10.1109/LED.2017.2757538

  • E. Memisevic, M. Hellenbrand, E. Lind, A. R. Persson, S. Sant, A. Schenk, J. Svensson, R. Wallenberg & L.-E. Wernersson, "Individual Defects in InAs/InGaAsSb/GaSb Nanowire Tunnel Field-Effect Transistors Operating below 60 mV/decade", Nano Letters, June 2017, doi: 10.1021/acs.nanolett.7b01455
Dr Markus  Hellenbrand
Not available for consultancy

Affiliations

Collaborator profiles: